SWISS is an AI inference accelerator built around an 8×8 systolic-array Matrix Multiply Unit (MXU) that is specifically optimized for NVIDIA-style 2:4 structured sparsity. Instead of treating sparse matrices as dense like traditional TPUs, it adds a lightweight switch network that dynamically routes only the nonzero activations and weights to the appropriate processing elements, reducing memory traffic and potentially doubling throughput and effective memory bandwidth. The chip also integrates on-chip SRAM buffers, a near-memory Vector Processing Unit (VPU), and an accumulator that performs operations such as ReLU and bias addition, enabling complete neural-network inference on a single device.