This project implements a TCP Offload Engine (TOE) designed for low-latency embedded systems operating over 1 Gb/s Ethernet. The TOE behaves as a lightweight NIC that offloads TCP/IP process- ing from the host processor. The system utilizes a fully pipelined transmit and receive datapath while minimizing dependence on host-side software processing. Instead of relying on a full software stack, the host provides packet descriptors and payload data di- rectly to the hardware. The TOE is responsible for TCP connection setup and teardown, header generation, checksum and CRC com- putations, and retransmission and acknowledgment handling. To support constrained on-chip SRAM, the design has a transmit window, limiting the total amount of unacknowledged payload data stored in SRAM.