LECTURE

TOPIC

LINK TO SLIDES

DATE PAPER ID

DUE DATE FOR SUMMARIES

Lecture 1

Introduction to Hardware Verification

Slides

Tuesday (01/26)

Lecture 2

Equivalence Checking

Slides and recording

Thursday (01/28)

Lecture 3

Combinational Equivalence Checking

Slides and recording

Tuesday (02/02)

Lecture 4

Binary Decision Diagrams (BDDs)

Slides and recording

Thursday (02/04)

Lecture 5

Equivalence Checking Using BDDs

Slides and recording

Tuesday (02/09) Eq checking

TUESDAY (02/09) (EXTENDED)

Lecture 6

SATisfiability solving

Slides and recording

Thursday (02/11)

Lecture 7

Equivalence Checking Using SAT

No class

Tuesday (02/16) BDD

TUESDAY (02/16)

Lecture 8

Sequential Equivalence Using FSMs

Slides and recording

Thursday (02/18)

Lecture 9

Sequential Equivalence Using FSMs

Slides and recording

Tuesday (02/23)

Lecture 10

Project proposal discussion

Thursday (02/25)

Lecture 11

Project proposal discussion

Tuesday (03/02)

Lecture 12

Sequential Equivalence

Recording

Thursday (03/04)

Lecture 13

Introduction to property/assertion checking

Recording

Tuesday (03/09)

Lecture 14

Temporal Logics, Specification and Properties

Slides

Tuesday (03/11) SAT

TUESDAY (03/11)

No class

Tuesday (03/23)

Lecture 16

Temporal Logics, Specification and Properties

Recording

Thursday (03/25)

Lecture 17

Model checking Recording

Tuesday (03/30) Model checking

Lecture 18

Assertion based verification Slides and recording

Thursday (04/01) Temporal logic

TUESDAY (04/01)

Lecture 19

Industrial Verification testbench architecture

Slides

Tuesday (04/06) Bounded model checking

THURSDAY (04/03)

Lecture 20

Constrained random verification

Thursday (04/08)

Lecture 21

Automatic assertion generation

Thursday (04/15)

Lecture 22

Post silicon validation

Tuesday (04/20)

Lecture 23 Post silicon validation

Lecture 24 Analog verification

PROJECT PRESENTATIONS

Tuesday (04/27)

Tuesday (04/29)

FINAL PROJECT REPORT DUE

Tuesday (05/04)

Thursday (05/06)

Tuesday (05/11)