General Information
Course Schedule
Homework
Exam
Videos (Past Semester)
Announcement
ECE 342: Electronic Circuits
Date
Topic
Reading
Homework scheduule
1
01/18/17
Introduction to subject area. Review of KVL and KCL
Notes/
Substitution Theorem
2
01/20/17
Thevenin and Norton Theorems. Independent and dependent sources
Notes
HW1 assigned
3
01/23/17
Linear and non-linear systems. Solving non-linear circuits.
Notes/4.2-4.3
4
01/25/17
Introduction to small-signal models (“incremental models”)
Notes/4.2-4.3
5
01/27/17
Small-signal analysis technique
Notes/4.2-4.3
HW 1 due. HW 2 assigned
6
01/30/17
CMOS technology
7
02/01/17
Ideal MOSFET I-V equations (NMOS and PMOS)
Notes/5.1-5.3
8
02/03/17
DC analysis of circuits with MOSFETs
Notes/5.1-5.3
HW 2 due. HW 3 assigned.
9
02/06/17
DC analysis, continued
10
02/08/17
Small-signal model of MOSFET
Notes/7.1-7.3, 7.5.1
11
02/10/17
AC (linear) model of CS amp
Notes/7.1-7.3, 7.5.1
HW 3 due. HW 4 assigned.
12
02/13/17
Common Source Amplifier Gain Contd.
02/15/17
MIDTERM 1 (7-8 PM)
13
02/17/17
Terminal impedances of MOSFETs (low-freq.). Input and output resistance of CS amp.
Notes
14
02/20/17
Using Gm, Rin and Rout to find gain of CS amp (“alternative method”).
Notes/
Amplifier modeling
15
02/22/17
Examples using the alternative method for circuit analysis.
Notes
16
02/24/17
Analysis of CS amp with source degeneration
HW 4 due. HW 5 assigned.
17
02/27/17
Analysis of CG and CD amps
Notes/7.3.5-6
18
03/01/17
BJT regions of operation. I-V equations for forward active region.
Notes/ 6.1-6.2
19
03/03/17
DC analysis of circuits with BJTs.
HW 5 due. HW 6 assigned.
20
03/06/17
BJT small-signal model. Voltage gain of CE stage.
Notes/7.2.2
21
03/08/17
BJT terminal impedances
03/10/17
EOH. Lectures cancelled.
HW 6 due. HW 7 assigned.
22
03/13/17
Emitter degenerated CE amp (Av, Rin, Rout)
Notes/7.3.4
23
03/15/17
CB and CC amps
CB amp
24
03/17/17
Frequency response. Transfer functions.
HW 7 due. HW 8 assigned.
25
03/27/17
Complex numbers. Bode plots.
Supplemental notes/
Bode plot
/
Appendix F
03/29/17
MIDTERM 2 (7-8 PM)
26
03/31/17
Transistor intrinsic capacitances
Supplemental notes/
Intrinsic capacitances
27
04/03/17
Procedure to derive the approximate transfer function directly from the circuit schematic. Miller's Theorem. Open circuit time constants.
Notes
28
04/05/17
Frequency response of CE and CS amps
Notes
29
04/07/17
Frequency response of CB/CG amps. Frequency response of cascaded CS/CE amps.
HW 8 due. HW 9 assigned.
30
04/10/17
Introduction to feedback. Properties of negative feedback.
Notes
31
04/12/17
Previous topic, continued. Brief introduction to positive feedback.
32
04/14/17
Stability of systems with negative feedback.
HW 9 due. HW 10 assigned.
04/17/17
MIDTERM 3 (7-8 PM)
33
04/19/17
Previous topic, continued (includes loop gain and phase margin).
34
04/21/17
Examples: feedback and stability analysis
35
04/24/17
Introduction to CMOS logic. RC delay model for CMOS inverter.
Notes/
VIH calculation revised
36
04/26/17
Transistor sizing
HW 10 due. HW 11 assigned.
37
04/28/17
PDN and PUN design for complementary static logic gates
38
05/01/17
Transistor sizing in combinational logic gates
39
05/03/17
Review
HW 11 due.