ECE 527

SoC Design

Fall 2023

General Information
Course Syllabus


Lectures
Homework
Machine Problems
Course Project
Exams

Tutorial Videos

Introduction to Pynq-Z2 and Downloading Vivado

Programming the Pynq-Z2 Programmable Logic

Programming the Pynq-Z2 Programmable Logic and Processor System

Using Integrated Logic Analyzers (ILAs)

Integrating Custom IPs with Vivado Block Designs

Vivado High-Level Synthesis (HLS) - Getting Started (Video)

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Vivado Version

Vivado 2019.1 is the version we'll use this semester. You can find it under the Vivado Archive tab on the left of the page after you click the link.

Additional Setup for Pynq-Z2

This semester we will be using the Pynq-Z2. The Pynq-Z2 boards require users to add board files manually in Vivado: (instructions adapted from the Pynq documentation)

1. Download the Pynq-Z2 board files.
2. Extract the `pynq-z2` directory from the zipped file downloaded.
3. Copy the entire `pynq-z2` directory to the following directory:

<Xilinx installation directory>\Vivado\<version>\data\boards\board_files

Then you should be able to see Pynq-Z2 in board selections when you create a new project in Vivado. Refer to Pynq-Z2 User Manual for pin assignments and configurations.

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Machine Problems

Machine Problem 1

Release Date: August 24, 2023

Due Date: September 3, 2023 (11:59 PM Central Time)

Project Description

Machine Problem 2

Release Date: September 5, 2023

Due Date: September 18, 2023 (11:59 PM Central Time)

Due Date: September 20, 2023 (11:59 PM Central Time)

Project Description

Ethernet Starter Code

Machine Problem 3

Release Date: September 20, 2023

Due Date: October 4, 2023 (11:59 PM Central Time, NO EXTENSION)

Project Description

Matrix-Multiply Starter HLS Design

Machine Problem 4

Release Date: October 5, 2023

Due Date: October 18, 2023 (11:59 PM Central Time)

Project Description

Example Test Case

Machine Problem 5

Release Date: October 21, 2023

Due Date: November 9, 2023 (11:59 PM Central Time)

Due Date: November 10, 2023 (11:59 PM Central Time)

Project Description

Tutorial

SD Card Files

Tutorial Files

 

(Links to the MPs will be available on release dates)

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A Note on Cable Driver

Pynq-Z2 uses a FT2232HL chip to support JTAG and UART through the same USB port. The driver should be installed automatically in recent Windows and Linux operating systems. Check the driver page from the manufacturer if you need to install it manually.

 

In Windows, the cable drivers for the programming cable should be installed automatically during Vivado installation. If you are using Linux, drivers for the programming cable may not be automatically installed. Linux users may need to install the drivers for the JTAG programmer separately. See Installing Cable Drivers in the Vivado installation guide if you couldn't find or connect to the device. If the cable driver from the Vivado installation does not work, you can try the driver from the Digilent website - Here.

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References

Verilog Links

• Verilog Overview
• The Verilog Hardware Description Language 5th Edition
• SystemVerilog Tutorial Document
• Intro to Verilog
• Verilog Tutorial from ASICWorld
• Doulos Verilog guide

Pynq-Z2 Resources

• Pynq-Z2 from TUL
• Pynq-Z2 Hardware User Guide
• Pynq-Z2 Board Files
• Pynq-Z2 User Constraints Master File (XDC)
• Pynq-Z2 Schematics
• Pynq: Python Productivity
• Pynq Documentation

Xilinx Tool References/Tutorial

• The Zynq Book (Good tutorials for Zynq and Zedboard, as well as details on Zynq development)
• Zynq design from scratch with the Zedboard
• Xillybus IP
• Xilinx Zynq-7000 SoC Design Hub
• Xilinx Zynq Technical Reference Manual
• Xilinx Vivado High-Level Synthesis
• Xilinx Vivado Embedded Design Tutorial
• Xilinx Zynq Documentation and Support
• Xilinx Vivado Documentation and Support
• Google is your friend :)

Misc

• What Every Programmer Should Know About Memory

Guide to memory, and memory systems in modern architectures

• What's New in CPUs Since the 80s and How Does It Affect Programmers?

Computer architecture crash course. Just the highlights, to familiarize yourself if you haven't had a chance to take a computer architecture course