Reading List
Paper reading list
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| Paper ID | Topic | Paper Title | Venue | Link | Paper Details |
|---|---|---|---|---|---|
| Paper 1 | KV cache management | Efficient Memory Management for Large Language Model Serving with PagedAttention | SOSP 2023 | Link to PDF | Open detailsPaper Description: Introduces virtual-memory-inspired KV-cache paging and sharing, making memory allocation and fragmentation first-class concerns in LLM serving. Related Readings:
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| Paper 2 | Prefill/decode | Taming Throughput-Latency Tradeoff in LLM Inference with Sarathi-Serve | OSDI 2024 | Link to PDF | Open detailsPaper Description: Introduced chunked prefill to break compute-heavy prompt processing into smaller chunks, co-batching them with memory-bound decode iterations. Related Readings:
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| Paper 3 | Prefill-decode disaggregation | Splitwise: Efficient Generative LLM Inference Using Disaggregated Compute | ISCA 2024 | Link to PDF | Open detailsPaper Description: Hardware-software co-design proving that prefill and decode stages thrive on different hardware architectures, for example FLOPS-rich compute nodes versus memory-bandwidth-rich nodes. Related Readings:
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| Paper 4 | Speculative decoding | Fast Inference from Large Language Models via Speculative Decoding | ICML 2023 | Link to PDF | Open detailsPaper Description: Used a fast draft model to generate candidate tokens speculatively, followed by a single parallel forward pass on the target model to verify multiple tokens at once. Related Readings:
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| Paper 5 | Kernel programming | Triton: An Intermediate Language and Compiler for Tiled Neural Network Computations | MAPL 2019 | Link to PDF | Open detailsPaper Description: Introduces a tile-level abstraction that raises GPU programming above CUDA threads while preserving enough control over locality, parallelism, and layouts to generate competitive AI kernels. Related Readings:
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| Paper 6 | Megakernel programming | Mirage Persistent Kernel: A Compiler and Runtime for Mega-Kernelizing Tensor Programs | arXiv 2025 | Link to PDF | Open detailsPaper Description: Replaces the kernel-per-operator execution model with an automatically generated persistent megakernel and SM-level task graph, enabling cross-operator pipelining and fine-grained compute-communication overlap. Related Readings:
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| Paper 7 | Attention kernel design and optimization | FlashAttention: Fast and Memory-Efficient Exact Attention with IO-Awareness | NeurIPS 2022 | Link to PDF | Open detailsPaper Description: Establishes IO-aware algorithm design by reformulating exact attention around GPU SRAM capacity and HBM traffic rather than optimizing arithmetic count alone. Related Readings:
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| Paper 8 | System optimization through semantic information | Parrot: Efficient Serving of LLM-Based Applications with Semantic Variable | OSDI 2024 | Link to PDF | Open detailsPaper Description: Demonstrates that compound and agentic applications should expose dependencies and application semantics so the serving system can optimize complete workflows rather than isolated requests. Related Readings:
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| Paper 9 | Scaling large models | Insights into DeepSeek-V3: Scaling Challenges and Reflections on Hardware for AI Architectures | ISCA 2025 | Link to PDF | Open detailsPaper Description: Connects MLA, MoE routing, FP8 training, communication overlap, and multi-plane networks to concrete hardware bottlenecks, providing a rare production-scale model-system-architecture co-design case study. Related Readings:
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| Paper 10 | Data movement in MoE | Patterns Behind Chaos: Forecasting Data Movement for Efficient Large-Scale MoE LLM Inference | ISCA 2026 | Link to PDF | Open detailsPaper Description: Characterizes temporal, spatial, and task-dependent regularities in expert activation and uses them to forecast MoE communication, demonstrating how workload prediction can guide expert placement and proactively hide large-scale all-to-all data movement. Related Readings:
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| Paper 11 | Hardware design space exploration | Timeloop: A Systematic Approach to DNN Accelerator Evaluation | ISPASS 2019 | Link to PDF | Open detailsPaper Description: Formalizes the joint exploration of tensor mappings, dataflows, memory hierarchies, and compute structures, allowing students to understand why accelerator efficiency depends as much on mapping as on peak arithmetic throughput. Related Readings:
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| Paper 12 | LLM on CPUs | SMEPilot: Characterizing and Optimizing LLM Inference with Scalable Matrix Extensions | arXiv 2026 | Link to PDF | Open detailsPaper Description: Characterizes existing LLM operators and phases, identifies their distinct compute and memory bottlenecks, and proposes operator-specific runtime, kernel, and data-layout optimizations. Related Readings:
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| Paper 13 | GPU alternatives for LLMs | Corsair: An In-Memory Computing Chiplet Architecture for Inference-Time Compute Acceleration | IEEE Micro 2025 | Link to PDF | Open detailsPaper Description: Describes d-Matrix's silicon-backed architecture combining digital in-memory compute, chiplets, block-floating-point numerics, hierarchical networks, and a dataflow software stack for bandwidth-bound generative-AI inference. Related Readings:
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| Paper 14 | Inference optimization on heterogeneous hardware platforms | Agent.xpu: Efficient Scheduling of Agentic LLM Workloads on Heterogeneous SoC | arXiv 2026 | Link to PDF | Open detailsPaper Description: Characterizes the execution and shared-memory interference of agentic LLM workloads across CPUs, iGPUs, and NPUs, and proposes a flow-aware heterogeneous scheduler that dynamically maps and preempts work to improve end-to-end latency and throughput. Related Readings:
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| Paper 15 | Energy/power optimization for LLM inference | DynamoLLM: Designing LLM Inference Clusters for Performance and Energy Efficiency | HPCA 2025 | Link to PDF | Open detailsPaper Description: Dynamically adjusts the number of serving instances, model parallelism, and GPU frequency based on workload and SLOs, and reports roughly 53 percent energy savings. Related Readings:
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