ECE 511, Fall 2005

Wen-mei W. Hwu, Instructor

Course Syllabus

Lecture

Date

Topics

1

2

3

 

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

 

 

24

25

26

27

28

 

8/24

8/29

8/31

9/5

9/7

9/12

9/14

9/19

9/21

9/26

9/28

10/3

10/5

10/10

10/12

10/17

10/19

10/24

10/26

10/31

11/2

11/7

11/9

11/14

11/16

11/21

11/23

11/28

11/30

12/5

12/7

12/16

Introduction and Overview; What is computer architecture?

Fundamentals and Basic Notions; technology, applications, measures

Instruction Set Architecture; issues, tradeoffs, subtleties

Labor Day – no class

Microarchitecture; instruction supply; data supply; high performance trends

Memory Systems I; DRAM, SRAM; caching techniques; victim caches

Memory Systems II; prefetching; pseudo-associative caches; high-bandwidth

Branch Prediction I; why do we care so much; simple; local; global

Branch Prediction II; hybrid predictors; interference; returns/indirect jumps

Wide Fetches: I-cache, trace caches

Dynamic Scheduling I; renaming, scheduling, retirement, P6 microarchitecture

Dynamic Scheduling II; variations; state recovery; complexity-effective

Multithreading: MT, SMT; HEP, Intel

VLIW: Simple hardware; profiling; trace scheduling; loop unrolling

Exam #1

EPIC I: general concepts; control speculation; recovery blocks

EPIC II: dependence speculation; predication; tradeoffs; IA-64 

Dynamic Optimization; concepts; Dynamo; Transmeta, ROAR, rePLay

Fault-Tolerance; why do we care; redundant hardware; redundant software

Low-Power Design: CMOS power model; energy vs. delay; clock gating

SIMD I: multimedia datatypes; vectors; vector machines

SIMD II: examples of vector machines; Cray

Multiprocessors I: general concepts

Multiprocessors II: shared memory; cache coherence

Fall break, no lecture

Fall break, no lecture

Multiprocessors III: directory-based machines; Stanford DASH

Multiprocessors IV: message passing computers; IBM SP2

Domain Specific Processors: DSPs; embedded designs;

Domain Specific Processors: GPUs; media processors

Exam #2

1:30-4:30: Class project poster session

I am currently scheduled to be traveling on 11/14 and 11/16 for MICRO and HiPEAC.. The plan is to have make-up classes by lecturing until 3:45 for at least six lectures. We will have make-up classes early during the semester to avoid crunch at the end of the first semester.