Exams
For all exams, you are allowed (and suggested) to bring a calculator.
Mid-Term Exam I
Date: Thu, 10/11
Time: 7--10 pm
Location: ECEB 1013 & 1015
Topics: MP, ISA, Pipelining, Cache, Memory Systems, and Virtual Memory
Mid-Term Exam II
Date: Tue, 11/13
Time: 7--10 pm
Location: ECEB 1013 & 1015
Topics: Control/Data Hazards, Tomasulo, Support for Precise Exception/Speculation, Software techniques for ILP, and Implementation Tradeoffs
Final Exam
Date: Friday, 12/14
Time: 8--11 am
Location: ECEB 1013 & 1015
Topics: The exam will cover three fundamental concepts of computer architecture: caches, pipelining and out-of-order execution. Additionally, topics presented following the second exam will be covered: modern system design considerations related to the case study lectures presented by Ahmed, Umur, and Chance as well as cache coherence.