Lecture and Assignment Schedule - Fall 2013
(subject to change)

In each week, the same instructor will lecture in both lecture sections. Incomplete slides will usually be posted in Mallard 24 hours in advance; you may print these slides and take them to lectures. After each lecture, completed slides will be posted in Mallard within 24 hours. You will occasionally complete assessments that will provide data to evaluate the effectiveness of the instruction. In discussion sections, you will collaborate to solve technical problems, under the supervision of an ECE 290 instructor or teaching assistant.

Week Date Lecture Topic

Web-Quizzes

due pm

ProblemSets and Lab

Projects

1   M Aug 26   1 Course overview; codes, parity, distance       
  W Aug 28   2 Preliminary assessment; number representations      
  R Aug 29   Binary and hexadecimal conversions, arithmetic, Hamming code      
2   M Sep 2     LABOR DAY (no classes)       
  W Sep 4 3 Gates, XOR, combinational circuit, Boolean functions, truth table    Week #1 Hwk #1    
  R Sep 5   Boolean translation exercises    Lab #1    
3   M Sep 9   4 Boolean algebra, duality, SOP, POS       
  W Sep 11 5 Minterms, maxterms, canonical forms, Karnaugh maps  Week #2 Hwk #2    
  R Sep 12   Boolean proof exercises      
4   M Sep 16   6 Prime implicants, minimal SOP, minimal POS      
  W Sep 18   7 Don't-cares; NAND, NOR  Week #3 Hwk #3    
  R Sep 26     Two's-complement exercises    Lab #2  
5   M Sep 23   8 Two's-complement representation, overflow         
  W Sep 25  9 Full adder, ripple-carry adder, delays, carry-lookahead  Week #4 Hwk #4    
  R Sep 26    Two's-complement exercises    Lab #3  
6   M Sep 30     REVIEW FOR HOUR EXAM          
  W Oct 2  10 Decoder, multiplexer, ALU design  Week #5 Hwk #5    
  R Oct 3    Discuss exam; ALU design exercises      
7   M Oct 7   11 SR latch, edge-triggered D flip-flop, timing diagram        
  W Oct 9   12 Sequential circuit analysis, state table; Team Meetings   Week #6 Hwk #6  
  R Oct 10   Informal early feedback; translate specifications to state machines     Lab #4  
8   M Oct 14   13 State diagram, sequential circuit design with D flip-flops         
  W Oct 16   14 Register, shift register, T flip-flop, counters; Team Meetings   Week #7 Hwk #7    
  R Oct 17   Sequential circuit design exercises     Lab #5  
9   M Oct 21   15 Bus, tri-state buffer, RTL, datapath design       Project 1 due
  W Oct 23  16 Algorithmic state machine, multiplier  Week #8 Hwk #8    
  R Oct 24     RTL exercises       
10   M Oct 28 17 ROM, RAM design, coincident decoding         
  W Oct 30   18 LC-3 organization, instructions; Team Meetings  Week #9 Hwk #9    
  R Oct 31     RAM design exercise    Lab #6  
11   M Nov 4  19 LC-3 instructions continued, LC-3 datapath      
  W Nov 6 20 LC-3 fetch/execute; Team Meetings Week #10    Hwk #10    
  R Nov 7    LC-3 programming exercises      
12   M Nov 11 21 Microprogrammed control; possible Team Meetings      
  W Nov 13   22 LC-3 microsequencer; Team Meetings  Week #11 Hwk #11    
  R Nov 14     Microprogramming exercises       
13   M Nov 18   23 Hardwired control      Project 2 due
  W Nov 20  24 Subroutine, stack  Week #12 Hwk #12  
  R Nov 21    Control unit exercises        
THANKSGIVING HOLIDAY
14   M Dec 2   25 Professional ethics: Incident at Morales, part 1       
  W Dec 4 26 Professional ethics: Incident at Morales, part 2    Week #13 Hwk #13    
  R Dec 5     Instruction evaluation; computer ethics exercises   Lab #7  
15   M Dec 9  27 Instruction evaluation; end-of-term assessment       
  W Dec 11   Course wrap-up, review session  Week #14 Hwk #14