Alkesh Sumant - asumant2 - ECE 120

Naveen Nathan - nnathan2 - ECE 110

Danny Freeman - djf6 - ECE 120


Statement of Purpose:

The will be two arrays of LEDs. The user will input a time into one of the arrays and the other array will “count up” until the time on the second array matches that of the first (the one the user input a time into). When the LED arrays match, all the LEDs will turn on indicating that “time’s up”. We plan on building the logic for the array of LEDs completely from scratch on a breadboard. The objective of this project is to expand knowledge gained in ECE 120 and apply designing circuits from FSMs to much larger projects.Our project is unique because it will solely be based on hardware and no software will be used to impact the logic of the timer in any way.

Background Research:

An important aspect of this project was to design and implement a different way for the device to interpret and display time. Instead of using regular numbers, we opted for a less traditional display - with a 4x4 array of LEDs, we plan to show time using powers of two in each row to display the minute, and seconds.





8




X

4



X

X

2

X

X

X

X

1

Minutes (10’s Place)

Minutes (1’s Place)

Seconds (10’s Place)

Seconds (1’s Place)



In this figure, the time can be calculated by adding all the digits individually in each column (Ex. the time displayed here is 11 mins, 37 seconds)


Block Diagram / Flow Chart:


System Overview:

The device itself will be composed of an LED screen (similar format as pictured above) connected to a network of hardware-based switches and logic gates. The user would toggle the switches formatted in an array to set the timer countdown, which will link to a gate network that will compare the switch array to the display array by interpreting which of their values match, and inputting power accordingly. The intended result will be the display counting up, which will be controlled by a separate logic network running the values of the display array. 

Parts:

  • 28 LEDs

  • A bunch of NAND and NOT IC chips

  • Jumper Wires

  • A couple of breadboards

  • 14 switches - 2 switch bricks (maybe more to reduce clutter?)


Possible Challenges:

Designing the logic for the timer is definitely the hardest challenge we anticipate.

Assembling the entire logic circuit may pose a problem since we foresee there being a lot of logic gates being used which can clutter up the breadboard pretty fast

References:

Regan, R. (2019). How to Read a Binary Clock - Exploring Binary. [online] Exploringbinary.com. Available at: https://www.exploringbinary.com/how-to-read-a-binary-clock/.

We plan on using a similar design to how this clock is laid out with the LEDs and how to calculate the time



Comments:

Hmm, your block diagram is not displaying correctly. Did you upload it as a PNG/JPG?


I like what I've seen so far, but please fix your block diagram so I have a better idea of what you want to do.

Posted by chorn4 at Feb 12, 2019 12:10

Sorry about that, it was previously uploaded as a google drawing. It should be fixed now.

Posted by nnathan2 at Feb 12, 2019 12:40