For this project, three separate FSM's will be designed to handle the various tasks required to authenticate a specific card:

• Parity Checker FSM - Ensures that the data bits correctly aligns with the odd/even parity bits presented by the RFID reader
• Data Loader FSM - Extracts 24 bits from the center of a 26-bit serial data sequence to load into shift register RAM
• Data Checker FSM - Compares the 24 bits from shift register RAM with bits in EEPROM to see if a match was attained

Parity Checker FSM

Parity OK when S₁S₀ = 00 and main counter == 25 (26 total bits received)