Labs

Remote Access for the computers in ECEB 4022

Here are instructions on how to remote access the computers in ECEB 4022. The FPGA boards are connected to the computers and powered on. You will be able to program these boards and run Vivado and Python remotely.

  • Log into https://my.engr.illinois.edu/labcheck, select ECEB and then ECEB 4022 to view current lab usage
  • Select an available PC and click 'Connect via remote desktop' to download the pre-configured Remote Desktop file
  • macOS users – click here to download the 'Microsoft Remote Desktop' app
  • Verify you are not connected to the campus VPN; this connection leverages the campus Remote Desktop gateway instead which will provide a better experience.
  • Open the downloaded RDP file
  • macOS users may need to select 'Window' --> 'Fit to Window'
  • Log in with your username as UOFI\NetID
  • If you encounter any errors, follow these Remote Desktop Gateway instructions (http://go.illinois.edu/rdpgateway-config)
  • Note:  eceb-4022-[01,06] appear to be offline; we are working on highlighting offline PCs

Turning on/off OpalKelly board and remote video

You can turn on and off the OpalKelly board using the USB controlled switches. The power switch is accessible via any internet browser. Go to the following address to control the power switch to the board:

  • Website: 192.168.1.100
  • User name: ece437
  • Password: ece437
  • The webcam connected to the PC can be accessed via VLC player. Once you start the player, go to Open VLC player -> Media -> Open Capture device and Select the “Logitech HD Webcam C270” to view the setup.

    Zoom conference Information

    During the lab sessions, the TA will be available via zoom to answer any questions you might have. You will need to start a zoom session and invite the TA to join your session.

    Overview

    Each lab has several checkpoints in it. You are required to demo the checkpoints to your TA during each lab session. Many labs build upon past work (if you construct an I2C serial interface in one lab, you will probably need to use it later on), so you are strongly encouraged to understand each assignment.

    Assignments

    Lab Assigned Date

    Due Date

    Primary Reference Documents Additional Reference Documents
    Lab 1 8/25 9/1
    Lab 2 9/1 9/8
    Lab 3 9/8 9/22
    Lab 4 9/22 9/29
    Lab 5 9/29 10/13
    Lab 6 10/13 10/20
    Midterm Exam 10/20 10/27
    Lab 7 11/03 11/10
    • none
    Lab 8 11/10 12/8
    Final Project 12/1 12/15
      none

     

    Here are some additional resources that will help you with your lab assignments:

    Links Document Description
    Front Panel API Front Panel online API
    Front Panel HDL Front Panel online HDL documentation
    Verilog online reference Excellent online reference for Verilog
    Python tutorial Online reference for Python